The Unity-Gain Buffer
The unity-gain buffer is shown in Figure 1. The circuit gives the highest input impedance of any operational amplifier circuit. Input impedance is equal to the differential input impedance multiplied by the open-loop gain, in parallel with common mode input impedance. The gain error of this circuit is equal to the reciprocal of the amplifier open-loop gain or to the common mode rejection, whichever is less.
Figure 1. Unity Gain Buffer
VOUT = VIN
R1 = RSOURCE
For minimum error due to input bias current
Input impedance is a misleading concept in a DC coupled unity-gain buffer. Bias current for the amplifier will be supplied by the source resistance and will cause an error at the amplifier input due to its voltage drop across the source resistance. Since this is the case, a low bias current amplifier such as the LH1026 should be chosen as a unity-gain buffer when working from high source resistances.
The cautions to be observed in applying this circuit are three: the amplifier must be compensated for unity gain operation, the output swing of the amplifier may be limited by the amplifier common mode range, and some amplifiers exhibit a latch-up mode when the amplifier common mode range is exceeded. The LM107 may be used in this circuit with none of these problems; or, for faster operation, the LM102 may be chosen.
1983 09 December 2007
Taking the root of a number using log converters is a fairly simple matter. All that is needed is to take the log of a voltage, divide it by, say 1⁄2 for the square root, and then take the antilog.
A sample-and-hold circuit which combines the low input current of FET’s with the low offset voltage of monolithic amplifiers.