Low Drift Sample and Hold circuit
Op Amplifiers circuits

Low Drift Sample and Hold circuit

By Robert J. Widlar

A sample-and-hold circuit which combines the low input current of FETТs with the low offset voltage of monolithic amplifiers.

A sample-and-hold circuit which combines the low input current of FETТs with the low offset voltage of monolithic amplifiers is shown in Figure 1. The circuit is a unity gain amplifier employing an operational amplifier and an FET source follower. In operation, when the sample switch, Q2, is turned on, it closes the feedback loop to make the output equal to the input, differing only by the offset voltage of the LM101. When the switch is opened, the charge stored on C2 holds the output at a level equal to the last value of the input voltage.

Figure 1. Low Drift Sample and Hold
Figure 1. Low Drift Sample and Hold

Some care must be taken in the selection of the holding capacitor. Certain types, including paper and mylar, exhibit a polarization phenomenon which causes the sampled voltage to drop off by about 50 mV, and then stabilize, when the capacitor is exercised over a 5V range during the sample interval. This drop off has a time constant in the order of seconds. The effect, however, can be minimized by using capacitors with teflon, polyethylene, glass or polycarbonate dielectrics.

Although this circuit does not have a particularly low output resistance, fixed loads do not upset the accuracy since the loading is automatically compensated for during the sample interval. However, if the load is expected to change after sampling, a buffer such as the LM102 must be added between the FET and the output.

A second pole is introduced into the loop response of the amplifier by the switch resistance and the holding capacitor, C2. This can cause problems with overshoot or oscillation if it is not compensated for by adding a resistor, R1, in series with the LM101 compensation capacitor such that the breakpoint of the R1C1 combination is roughly equal to that of the switch and the holding capacitor.

It is possible to use an MOS transistor for Q1 without worrying about the threshold stability. The threshold voltage is balanced out during every sample interval so only the short-term threshold stability is important. When MOS transistors are used along with mechanical switches, drift rates less than 10 mV/min can be realized.

Additional features of the circuit are that the amplifier acts as a buffer so that the circuit does not load the input signal.

Further, gain can also be provided by feeding back to the inverting input of the LM101 through a resistive divider instead of directly.

1850 08 December 2007

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